AUTHORS: Azam Beg
PUBLICATION/VENUE: Lecture Notes ICST (LNICST) (Springer), Oct 2009, pp. 270-275.
The reliability of nano-sized combinational circuits can be estimated by using different techniques, such as mathematical equations, Monte Carlo simulations, algorithmic approaches, and combinations of these. Commonly used equations are functions of gate count, and of the reliability and number of devices that make up the gates. The aim of this paper is to present a(n alternative) neural-based approach which is more accurate than applying simple equations, while being faster than the time-consuming Monte Carlo technique.
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